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[SCMspi

Description: 使用c8051f005通过SPI读取SCA100T角度值的程序-spi c8051f005
Platform: | Size: 2048 | Author: 纯净水 | Hits:

[VHDL-FPGA-Verilogspi2-testbench

Description: test bench for spi communication
Platform: | Size: 1024 | Author: Onur | Hits:

[SCMspi

Description: 三线spi接口,用verilog实现,作为一个模块,可以接收并行数据,然后串行发送-Three Line spi interface, using Verilog implementation, as a module, can receive parallel data, and then send the serial
Platform: | Size: 1024 | Author: 郭文豹 | Hits:

[VHDL-FPGA-Verilogspi_vhdl_source

Description: SPI的VHDL程序,经过quartus验证的,不错!-SPI of the VHDL program, after verification quartus, yes!
Platform: | Size: 671744 | Author: 王头 | Hits:

[VHDL-FPGA-Verilog43680540SPI_Core

Description: Verilog for SPI Core source code
Platform: | Size: 14336 | Author: J.M Yang | Hits:

[Embeded-SCM DevelopSPI

Description: SPI,是英语Serial Peripheral interface的缩写,顾名思义就是串行外围设备接口。-SPI, is the English acronym for Serial Peripheral interface, as its name suggests is a serial interface peripherals.
Platform: | Size: 4096 | Author: 司令 | Hits:

[SCSI-ASPIspi_Master

Description: 实现了对SD卡的SPI方式下读写操作,已经测试了,可以直接用-The realization of the SD card to read and write SPI operation mode has been tested, can be directly used
Platform: | Size: 2116608 | Author: 张立涛 | Hits:

[Embeded-SCM Developspi_slave

Description: spi slave 8bit address 1bit r/w 7bit number data
Platform: | Size: 155648 | Author: im | Hits:

[Otherspi.tar

Description: This is a verilog code used oversampled clock to implement SPI slave. Also include C code for a ARM processor as the SPI master-This is a verilog code used oversampled clock to implement SPI slave
Platform: | Size: 1024 | Author: johnl | Hits:

[VHDL-FPGA-Verilogspi_op_core

Description: spi controller SPI IP core
Platform: | Size: 81920 | Author: denny | Hits:

[VHDL-FPGA-Verilogslave_spi_ctrl

Description: SPI 的FPGA控制源代码,用于一般通用的SPI技术,FPGA/CPLD控制的AD数据采集-SPI control course code
Platform: | Size: 1024 | Author: luxiaogang | Hits:

[Otherspi_master

Description: SPI wishbone master and verification environment
Platform: | Size: 2506752 | Author: 王小墨 | Hits:

[Embeded-SCM Developspi_core_open

Description: SPI 设计 为主机设计,供大家参考,希望对大家有用-SPI master design
Platform: | Size: 96256 | Author: | Hits:

[VHDL-FPGA-Verilogled

Description: 与串口通讯控制led(使用VHDL硬件描述语言,通过Altera QuartusII 开发)-Serial control and communications led (the use of VHDL hardware description language, through the development of Altera QuartusII)
Platform: | Size: 86016 | Author: 刘磊 | Hits:

[SCMSPI_vrilog

Description: SPI接口源码,语言vrilog,包括MASTER和SLAVE-SPI interf for vrilog.
Platform: | Size: 3072 | Author: linno | Hits:

[Software Engineeringspi

Description: send SPI data that is writen as FSM-send SPI data that is writen as FSM
Platform: | Size: 1024 | Author: rez | Hits:

[VHDL-FPGA-VerilogsimpleSPI_M_S

Description: SPI的VHDL程序,经过xilinx验证的-SPI of the VHDL program, after verification of xilinx
Platform: | Size: 142336 | Author: 陳皇仁 | Hits:

[VHDL-FPGA-Verilogspitoi2s3

Description: spi转i2s的verilog程序,fpga是总模块,spi和i2s是子模块,shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert
Platform: | Size: 5120 | Author: steny | Hits:

[VHDL-FPGA-VerilogFPGASPI

Description: 用FPGA实现主SPI程序,包含开发工程、测试文件和源文件代码-fpga design the SPI code
Platform: | Size: 301056 | Author: Lee | Hits:

[Other Embeded programSPI

Description: SPI(Serial Peripheral Interface)是一种串行同步通讯协议,由一个主设备和一个或多个从设备组成,主设备启动一个与从设备的同步通讯,从而完成数据的交换。SPI 接口由SDI(串行数据输入),SDO(串行数据输出),SCK(串行移位时钟),CS(从使能信号)四种信号构成,CS 决定了唯一的与主设备通信的从设备,如没有CS 信号,则只能存在一个从设备,主设备通过产生移位时钟来发起通讯。通讯时,数据由SDO 输出,SDI 输入,数据在时钟的上升或下降沿由SDO 输出,在紧接着的下降或上升沿由SDI 读入,这样经过8/16 次时钟的改变,完成8/16 位数据的传输。-/ SPI协议中的McBSP时钟停止模式 SPI协议是以主从方式工作的,这种模式通常有一个主设备和一个或多个从设备,其接口包括以下四种信号: (1)串行数据输入(也称为主进从出,或MISO); (2)串行数据输出(也称为主出从进,或MOSI); (3)串行移位时钟(也称为SCK); (4)从使能信号(也称为SS)。
Platform: | Size: 1024 | Author: 王静 | Hits:
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